1. Field of the Invention
The present invention relates to a memory connected state detecting circuit for detecting whether or not a memory is connected to a designated address where information written in a computer system. It is particularly useful in a personal computer system, which use a plurality of memories such as RAMs.
2. Description of the Prior Art
In personal computers, a RAM or RAMs (random access memory) are used as a memory and a desired memory capacity is obtained by mounting a plurality of RAM boards, having, for instance, 128 k bits of memory capacity. In these personal computers, it is normal to use less than the actual capacity of the RAM boards. For instance, even when it is possible to arrange maximum memory capacity of 640 k bits as a RAM by using up to five memory boards each having 128 k bits, it is often the case that the maximum memory capacity is not actually used, rather a memory capacity of up to 256 k bits is used by mounting two RAM boards each having the 128 k bits.
On the other hand, it is often necessary to preliminarily know the total memory capacity of the RAM boards to be used, so as to attain a desired memory capacity. For this reason, switches are provided in the prior art of the kind, which preliminarily set up the RAM memory capacity. Actual RAM memory capacity is identified by the operated condition of the switches. In these computer memory testing systems, the switches must be placed where they are easily accessible to users of the system. Consequently, additional spaces as well as an additional hardware including mechanical switches, terminals, and associated wiring, are required.
This is not economical, because of the need of various components. In addition, when the setting up of the actual memory capacity using these switches is erroneously done, it results in a malfunction, since the cause of the error can not be specified.